Description:
This file with the wavelet transf
Mallat implementation of wavelet
Verilog hdl code modules for radi
Modelsim 6.6 crack, can be used f
A written using Verilog DDR2 cont
Simple CPU VHDL implementation an
Dual-port RAM design, using Veril
Verilog language, a hardware-base
FPGA embedded project combat, Man
Application FPGA, FPGA-chip hardw
Mallat implementation of wavelet
Layer of one-dimensional wavelet Platform: |
Size: 1852416 |
Author:sansfroid |
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Description: fpga vhdl实现一个标准双端口ram，可以作为单端口或者双端口用
-fpga vhdl achieve a standard dual-port ram, can be used as a single port or dual port with a Platform: |
Size: 3072 |
Author:站长 |
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Description: Package consists of two pdf files:
i)cdr project: theory and implementation of vhdl
ii)I2C bus controller: xilinx implementation of uC interface on CPLD
Package consists of 7 vhdl files:
string_detector: detects the continuous string of 111
led_driver: code for running leds on dvpt board
clk_div: clock divider circuitry (component for led code)
mem: memory component for led code
ram_dual: dual port ram implementation-Package consists of two pdf files:
i)cdr project: theory and implementation of vhdl
ii)I2C bus controller: xilinx implementation of uC interface on CPLD
Package consists of 7 vhdl files:
string_detector: detects the continuous string of 111
led_driver: code for running leds on dvpt board
clk_div: clock divider circuitry (component for led code)
mem: memory component for led code
ram_dual: dual port ram implementation
Platform: |
Size: 4604928 |
Author:Sharav |
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Description: 用VHDL描述了一个32KBit的独立的读写时钟、使能、地址的双口RAM，-VHDL description of a 32KBit with independent read and write clock, enable, address the dual-port RAM, Platform: |
Size: 1024 |
Author:dengyaohui |
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Description: 本文介绍了应用FPGA实现对高速A/D转换芯片的控制电路，介绍了这一控制的设计思想，并提出了通过双口RAM实现FPGA与慢速度的单片机进行双机数据通信处理的解决方案。- Data acquisition is an item of indispensable technology which is essential to the industrial control system. As the increasing need for speed performance of the data collection requirements, FPGA technology came into being. This paper introduces the high-speed A/D converter by using FPGA chip control circuit detailing, discussing the design of the control circuit, at the same time submitting the FPGA through dual-port RAM and slow-speed single-chip dual-computer data communications solutions. FPGA and Single-chip microcomputer mutual coordination work, control the data acquisition system, and Single-chip microcomputer with rich peripherals can be extended accordingly. The circuit of the design that use VHDL language to complete. Through the program designing and testing, the voltage information which is showed in the PC through serial port transmission collected ultimately. It is successful to realize the mutual communication between FPGA and single-chip microcomputer. Platform: |
Size: 117760 |
Author:陈建华 |
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Search - vhdl dual port ram